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Implements a JK flip flop as a clocked flip flop. More...
Inherits FGXMLAutopilot::ClockedFlipFlopImplementation.
Inherited by FGXMLAutopilot::MonoFlopImplementation.
Public Member Functions | |
JKFlipFlopImplementation (bool rIsDominant=true) | |
constructor for a JKFlipFlopImplementation | |
virtual bool | onRaisingEdge (DigitalComponent::InputMap input, bool &q) |
compute the output state according to the logic table on the raising edge of the clock | |
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ClockedFlipFlopImplementation (bool rIsDominant=true) | |
constructor for a ClockedFlipFlopImplementation | |
virtual bool | getState (double dt, DigitalComponent::InputMap input, bool &q) |
evaluates the output state from the input lines. | |
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RSFlipFlopImplementation (bool rIsDominant=true) | |
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virtual | ~FlipFlopImplementation () |
bool | configure (SGPropertyNode &prop_root, SGPropertyNode &cfg) |
configure this component from a property node. | |
virtual bool | isConfigProperty (const std::string &cfg_name) const |
Additional Inherited Members | |
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virtual bool | configure (SGPropertyNode &cfg_node, const std::string &cfg_name, SGPropertyNode &prop_root) |
configure this component from a property node. | |
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bool | _rIsDominant |
Implements a JK flip flop as a clocked flip flop.
The JK flip flop has five input lines: R, S, clock, J and K. The R and S lines work as described in the RS flip flop. Setting the J line to true sets the output to true on the next raising edge of the clock line. Setting the K line to true sets the output to false on the next raising edge of the clock line. If both, J and K are true, the output is toggled at with every raising edge of the clock line.
Undefined inputs default to false.
Logictable | ||||||
S | R | J | K | clock | Q (previous) | Q |
false | false | false | false | any | any | unchanged |
true | false | any | any | any | any | true |
any | true | any | any | any | any | false |
false | false | true | false | ^ | any | true |
false | false | false | true | ^ | any | false |
false | false | true | true | ^ | false | true |
false | false | true | true | ^ | true | false |
Definition at line 194 of file flipflop.cxx.
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inline |
constructor for a JKFlipFlopImplementation
rIsDominant | boolean flag to signal if RESET shall be dominant (true) or SET shall be dominant (false) |
Definition at line 200 of file flipflop.cxx.
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virtual |
compute the output state according to the logic table on the raising edge of the clock
input | a map of named input lines |
q | a reference to a boolean variable to receive the output state |
Implements FGXMLAutopilot::ClockedFlipFlopImplementation.
Definition at line 366 of file flipflop.cxx.