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FGXMLAutopilot::JKFlipFlopImplementation Class Reference

Implements a JK flip flop as a clocked flip flop. More...

Inherits FGXMLAutopilot::ClockedFlipFlopImplementation.

Inherited by FGXMLAutopilot::MonoFlopImplementation.

Public Member Functions

 JKFlipFlopImplementation (bool rIsDominant=true)
 constructor for a JKFlipFlopImplementation
 
virtual bool onRaisingEdge (DigitalComponent::InputMap input, bool &q)
 compute the output state according to the logic table on the raising edge of the clock
 
- Public Member Functions inherited from FGXMLAutopilot::ClockedFlipFlopImplementation
 ClockedFlipFlopImplementation (bool rIsDominant=true)
 constructor for a ClockedFlipFlopImplementation
 
virtual bool getState (double dt, DigitalComponent::InputMap input, bool &q)
 evaluates the output state from the input lines.
 
- Public Member Functions inherited from FGXMLAutopilot::RSFlipFlopImplementation
 RSFlipFlopImplementation (bool rIsDominant=true)
 
- Public Member Functions inherited from FGXMLAutopilot::FlipFlopImplementation
virtual ~FlipFlopImplementation ()
 
bool configure (SGPropertyNode &prop_root, SGPropertyNode &cfg)
 configure this component from a property node.
 
virtual bool isConfigProperty (const std::string &cfg_name) const
 

Additional Inherited Members

- Protected Member Functions inherited from FGXMLAutopilot::FlipFlopImplementation
virtual bool configure (SGPropertyNode &cfg_node, const std::string &cfg_name, SGPropertyNode &prop_root)
 configure this component from a property node.
 
- Protected Attributes inherited from FGXMLAutopilot::RSFlipFlopImplementation
bool _rIsDominant
 

Detailed Description

Implements a JK flip flop as a clocked flip flop.

The JK flip flop has five input lines: R, S, clock, J and K. The R and S lines work as described in the RS flip flop. Setting the J line to true sets the output to true on the next raising edge of the clock line. Setting the K line to true sets the output to false on the next raising edge of the clock line. If both, J and K are true, the output is toggled at with every raising edge of the clock line.

Undefined inputs default to false.

Logictable
SRJKclockQ (previous)Q
falsefalsefalsefalseanyanyunchanged
truefalseanyanyanyanytrue
anytrueanyanyanyanyfalse
falsefalsetruefalse^anytrue
falsefalsefalsetrue^anyfalse
falsefalsetruetrue^falsetrue
falsefalsetruetrue^truefalse

Definition at line 194 of file flipflop.cxx.

Constructor & Destructor Documentation

◆ JKFlipFlopImplementation()

FGXMLAutopilot::JKFlipFlopImplementation::JKFlipFlopImplementation ( bool rIsDominant = true)
inline

constructor for a JKFlipFlopImplementation

Parameters
rIsDominantboolean flag to signal if RESET shall be dominant (true) or SET shall be dominant (false)

Definition at line 200 of file flipflop.cxx.

Member Function Documentation

◆ onRaisingEdge()

bool JKFlipFlopImplementation::onRaisingEdge ( DigitalComponent::InputMap input,
bool & q )
virtual

compute the output state according to the logic table on the raising edge of the clock

Parameters
inputa map of named input lines
qa reference to a boolean variable to receive the output state
Returns
true if the state has changed, false otherwise

Implements FGXMLAutopilot::ClockedFlipFlopImplementation.

Definition at line 366 of file flipflop.cxx.


The documentation for this class was generated from the following file: